CY7C68013A datasheet, driver & logic analyzer
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ADAU1701 VS USBi vs ez-usb fx2lp cy7c68013a
CY7C68013A
The CY7C68013A is a handy USB microcontroller you’ll love using in USB-to-serial adapters, data acquisition systems, or FPGA interfaces. It supports high-speed USB 2.0 at up to 480 Mbps and packs an enhanced 8051 core running at 48MHz with 16KB RAM. Just remember your firmware loads via USB or EEPROM at startup. It has 48 versatile GPIO pins for serial, parallel, or FIFO data transfer, plus four built-in DMA channels for high-speed data handling. Power-wise, it runs on 3.3V, with some pins tolerant of 5V. Usually comes in a TQFP-56 package, easy enough to solder by hand.
CY7C68013A Pinout Diagram
Pin Number | Pin Name | Type | Function Description |
---|---|---|---|
7–14 | PA0–PA7 | I/O | General I/O, configurable as internal FIFO, waveform generation, etc. |
15–22 | PB0–PB7 | I/O | General I/O, typically used for GPIF, UART, external control, etc. |
23–30 | PC0–PC7 | I/O | General I/O, supports clock output, INT interrupt input, etc. |
31–38 | PD0–PD7 | I/O | Data bus (used as FIFO data line in FIFO mode), supports external communication |
1 | IFCLK | Output | GPIF/FIFO clock output |
2 | RDY0 | Input | Handshake signal input, supports external data fetch |
3 | RDY1 | Input | Handshake signal input, supports internal data fetch |
5 | SCL | I/O | I²C serial EEPROM clock (used for EEPROM boot) |
6 | SDA | I/O | I²C serial EEPROM data |
40 | D+ | USB | USB data positive |
41 | D− | USB | USB data negative |
46 | XTALIN | Input | External crystal input (commonly paired with 24MHz crystal) |
47 | XTALOUT | Output | External crystal output |
48 | RESET# | Input | Active low reset input (pull-up by default) |
9, 24 | AVCC/GND | Power | Analog power and ground input |
Multiple | VCC / GND | Power | Main power 3.3V / ground |
When you’re using the CY7C68013A chip, make sure the USB data lines (D+ and D–) connect right next to the USB socket, each through a 27Ω resistor, and add a 1.5k pull-up on the D+ line. Your EEPROM (like the 24LC64) connects via the I²C pins SDA and SCL—this lets the chip automatically load firmware at startup. Keep the RESET# pin pulled high normally, but you can pull it low if you need to reset or reload firmware. Also, the chip’s IO ports can handle lots of functions—you’ll need to configure them in your firmware. Ensure a stable 3.3V supply, and filter the AVCC pin. Finally, use a 24MHz crystal; the chip will double it internally to 48MHz.
CY7C68013A Equivalent USB Microcontroller
Parameter / Model | CY7C68013A | CH559L | STM32F103CBT6 | LPC11U35FET48 |
---|---|---|---|---|
Core Architecture | Enhanced 8051 | Enhanced 8051 | ARM Cortex-M3 | ARM Cortex-M0 |
Main Frequency | 48 MHz | 24 MHz | 72 MHz | 50 MHz |
USB Type | USB 2.0 High-Speed (480 Mbps) | USB 2.0 Full-Speed (12 Mbps) | USB 2.0 Full-Speed | USB 2.0 Full-Speed |
RAM | 16 KB SRAM | 16 KB SRAM | 20 KB SRAM | 10 KB SRAM |
Flash | None (requires EEPROM or USB download) | 64 KB | 128 KB | 64 KB |
Package Type | TQFP-56 | LQFP-48 | LQFP-48 | HVQFN-48 |
I/O Pins | 48 | 36 | 37 | 42 |
Development Ecosystem | Cypress FX2 SDK (Keil) | Keil / SDCC | STM32Cube / Keil / Arduino | MCUXpresso / Keil |
Special Features | Supports USB FIFO bridge, logic analyzer | Built-in USB, SPI, ADC; suitable for low-speed bridging | USB CDC, HID, DFU, multiple peripheral support | Low-power, compact USB MCU |
If you’re thinking of replacing your CY7C68013A, first check your USB speed needs. The CH559L uses the same 8051 core and includes USB, but it’s only 12Mbps (Full-Speed), which won’t handle logic analyzers or high-speed data acquisition. The STM32F103 is more powerful with built-in Flash, removing the need for EEPROM, but it uses ARM architecture—meaning you’ll need to rewrite your firmware completely. LPC11U35 is also ARM-based, compact, and low-power, but again limited to Full-Speed USB, ideal for simple peripherals like keyboards or mice. If you truly need high-speed (480Mbps), stick with the CY7C68013A series variants. Otherwise, CH559L or STM32F103 are great, provided you’re prepared for firmware changes.
CY7C68013A FX2LP Circuit Example
In this circuit, you’ve got the CY7C68013A (FX2LP) handling USB data communication. On the left side, you can see USB D+ and D- connected neatly—exactly as recommended. There’s also a 24LC32 EEPROM hooked up via I²C, storing your firmware so it automatically loads at startup, saving you from constant USB programming. The 24MHz crystal provides the standard clock frequency for FX2LP’s USB operation. On the right, it connects directly to a Xilinx Spartan-3 FPGA through FIFO lines like SLWR, SLRD, and FLAG signals. This setup is perfect if you need a straightforward USB-to-FPGA data transfer solution in your project.
CY7C68013A FPGA Interface Setup
CY7C68013A (FX2LP) interfaces with FPGA using its built-in Slave FIFO mode, making high-speed data exchange straightforward. You just connect FX2’s data bus (FD) to your FPGA, control data transfer with SLRD and SLWR signals, and use SLOE to decide who drives the bus. IFCLK can be supplied by FX2 or externally. On the FPGA side, use FLAG signals to check FIFO status, and manage data flow through state machines. For firmware, use Cypress’s own development kit with Keil C51. Double buffering and DMA will help when transferring large amounts of data.
CY7C68013A USB Firmware Project
When you develop USB firmware with CY7C68013A (FX2LP), your goal is exchanging data between the PC and the chip, like USB-to-FIFO, HID devices, or bulk data transfer. You’ll mainly use Keil to write your firmware and edit USB descriptors to set device types and endpoints, such as EP2 for receiving and EP6 for sending data. Set the FIFO mode and clock settings, then handle USB events and packets in your main loop. Cypress’s official tools help you test USB connections, and EEPROM loading makes firmware startup easier. This approach works especially well for data bridges or logic analyzers.